Multilevel memory devices (such as, for example, flash E2PROMs) are commonly used in several applications. As it is known, in a multilevel memory device each cell can take a number of states higher than two (each state being associated with a corresponding logic value).
This results in a high density of the multilevel memory device, with a consequent low cost per units of stored information. Nevertheless, this result is achieved maintaining good performance of the memory device; particularly, the multilevel memory devices provide high information transfer speeds in burst mode. Consequently, the multilevel memory devices are well suited to a number of end-product applications, such as solid state mass memories, cellular telephones, digital still cameras, multimedia devices, and the like.
A still open question relating to the multilevel memory devices is their reliability. In fact, the multilevel memory devices are considered more sensitive to data retention problems and to noise than equivalent traditional memory devices (at two levels). Consequently, many producers equip the multilevel memory devices with error detection structures.
For this purposes, Error Correction Codes, or ECC, are commonly used. The error correction codes add redundant control information to each predefined set of logic values (for example, consisting of a page formed by four words each one of 16 bits). This control information is used for detecting and correcting (if possible) any errors in the page. This allows tolerating a drift of the cells in the multilevel memory device without impairing its operation.
Nevertheless, the error detection structures known in the art involve a considerable waste of space for storing the control information associated with the various pages. Furthermore, the logic networks commonly used for calculating the control information require a high number of levels; such levels introduce corresponding propagation delays of the signals, thereby slowing down the operation of the whole multilevel memory device.
Furthermore, the error detection structures impose some constraints to the operation of the multilevel memory device. Particularly, once a page with the respective control information has been written onto the multilevel memory device, it is generally impossible to modify its content any longer (without a complete erasing and re-writing of the updated page with the new control information). In the same way, this requires the reading of a whole page (for verifying its correctness), before the content thereof can be used. In other words, the size of the page defines the granularity of the multilevel memory device.
However, several applications need to process information at the word level or even at the bit level. For example, this can happen when the multilevel memory devices are used in the place of pre-existing standard memory devices. Such requirements cannot be satisfied by the error detection structures known in the art. In fact, this would require an amount of control information that is absolutely unacceptable, thereby making vain the advantages provided by the use of three multilevel memory devices.